| • |
Fully
support provisions of IEEE 1394 - 1905 for high-performance
serial bus and the P1394a draft 2.0 standard. |
| • |
Provides
three fully compliant cable ports at 100 / 200 / 400 Mbits/s
and available with one, two or three ports. |
| • |
Fully
compliant with open HCI requirements. |
| • |
Full
P1394a additional function support. |
| • |
Support
optional 1394 annex J electrical isolation barter at PHY-link
interface. |
| • |
Support
power-down feature to conserve energy in battery powered
applications. |
| • |
Cable
power presence monitoring. |
| • |
Separate
cable bias (TPBIAS) and driver termination voltages supply
for each port. |
| • |
Encode
and decode functions included for data-strobe bit level
encoding. |
| • |
Support
LPS / link-on pin for PHY-link interface. |
| • |
Incoming
data resynchronized to local clock. |
| • |
Node
power-class information signaling for system power management.
|
